A robust 8F/sup 2/ ferroelectric RAM cell with depletion device (DeFeRAM)

Author

Braun, Georg ; Hoenigschmid, Heinz ; Scklager, T. ; Weber, Werner

Author_Institution

Memory Products, Infineon Technol. AG, Munich, Germany

Volume

35

Issue

5

fYear

2000

fDate

5/1/2000 12:00:00 AM

Firstpage

691

Lastpage

696

Abstract

This paper describes an area-penalty-free, leakage-compensated, and noise-immune 8F/sup 2/ cell design suitable for high-density, low-power ferroelectric RAM (FeRAM) generations. The new concept features a 1T1C ferroelectric memory cell containing an additional depletion device (DeFeRAM) controlled by the passing word line in a folded bit-line architecture. The depletion device permits the use of a common cell plate at intermediate voltage level. A highly reliable three-level word-line driver circuit design is discussed.

Keywords

driver circuits; ferroelectric storage; integrated circuit design; leakage currents; low-power electronics; memory architecture; random-access storage; DeFeRAM; common cell plate; depletion device; folded bit-line architecture; intermediate voltage level; low-power electronics; passing word line; robust 8F/sup 2/ ferroelectric RAM cell; three-level word-line driver circuit; Capacitors; Energy consumption; Ferroelectric films; Ferroelectric materials; Leakage current; Nonvolatile memory; Random access memory; Robustness; Tin; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.841493

Filename

841493