DocumentCode
1332181
Title
A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-/spl mu/m CMOS technology
Author
Lam, Christopher ; Razavi, Behzad
Author_Institution
Dept. of Electr. Eng., California Univ., Los Angeles, CA, USA
Volume
35
Issue
5
fYear
2000
fDate
5/1/2000 12:00:00 AM
Firstpage
788
Lastpage
794
Abstract
This paper describes the design of a CMOS frequency synthesizer targeting wireless local-area network applications in the 5-GHz range. Based on an integer-N architecture, the synthesizer produces a 5.2-GHz output as well as the quadrature phases of a 2.6-GHz carrier. Fabricated in a 0.4-/spl mu/m digital CMOS technology, the circuit provides a channel spacing of 23.5 MHz at 5.2 GHz while exhibiting a phase noise of -115 dBc/Hz at 2.6 GHz and -100 dBc/Hz at 5.2 GHz (both at 10-MHz offset). The reference sidebands are at -53 dBc at 2.6 GHz, and the power dissipation from a 2.6-V supply is 47 mW.
Keywords
CMOS integrated circuits; UHF integrated circuits; field effect MMIC; frequency synthesizers; integrated circuit design; mixed analogue-digital integrated circuits; transceivers; voltage-controlled oscillators; wireless LAN; 0.4 micron; 2.6 GHz; 2.6 V; 47 mW; 5.2 GHz; CMOS technology; frequency synthesizer; integer-N architecture; quadrature phases; wireless LAN applications; wireless local-area network; CMOS technology; Channel spacing; Circuits; Frequency synthesizers; Local area networks; Paper technology; Phase noise; Transceivers; Voltage-controlled oscillators; Wireless LAN;
fLanguage
English
Journal_Title
Solid-State Circuits, IEEE Journal of
Publisher
ieee
ISSN
0018-9200
Type
jour
DOI
10.1109/4.841508
Filename
841508
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