DocumentCode
13326
Title
High-Performance Normally-Off
MOSFET Using a Wet Etching-Based Gate Recess Technique
Author
Ye Wang ; Maojun Wang ; Bing Xie ; Wen, Cheng P. ; Jinyan Wang ; Yilong Hao ; Wengang Wu ; Chen, Kevin J. ; Bo Shen
Author_Institution
Inst. of Microelectron., Peking Univ., Beijing, China
Volume
34
Issue
11
fYear
2013
fDate
Nov. 2013
Firstpage
1370
Lastpage
1372
Abstract
This letter reports a normally-OFF Al2O3/GaN gate-recessed MOSFET using a low-damage digital recess technique featuring multiple cycles of plasma oxidation and wet oxide removal process. The wet etching process eliminates the damage induced by plasma bombardment induced in conventional inductively coupled plasma dry etching process so that good surface morphology and high interface quality could be achieved. The fully recessed Al2O3/GaN MOSFET delivers true enhancement-mode operation with a threshold voltage of +1.7 V. The maximum output current density is 528 mA/mm at a positive gate bias of 8 V. A peak field-effect mobility of 251 cm2/V·s is obtained, indicating high-quality Al2O3/GaN interface.
Keywords
III-V semiconductors; MOSFET; alumina; current density; gallium compounds; sputter etching; surface morphology; wide band gap semiconductors; Al2O3-GaN; enhancement-mode operation; high-performance normally-off Al2O3/GaN MOSFET; inductively coupled plasma dry etching process; interface quality; low-damage digital recess technique; maximum output current density; peak field-effect mobility; plasma bombardment; plasma oxidation; positive gate bias; surface morphology; threshold voltage; voltage 1.7 V; voltage 8 V; wet etching-based gate recess technique; wet oxide removal process; Aluminum gallium nitride; Aluminum oxide; Gallium nitride; HEMTs; Logic gates; MOSFET; Plasmas; AlGaN/GaN; MOSFET; high-$k$ ; normally-off; recess;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2013.2279844
Filename
6601679
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