• DocumentCode
    1335014
  • Title

    Metal–Oxide–High- k -Oxide–Silicon Memory Device Using a Ti-Doped \\hbox {Dy}_{2}\\hbo</h1></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author</span></div><div class='col-12 col-md-9 leftDirection leftAlign'><h2 class='mb-0 fw-semibold'>Fa-Hsyang Chen ; Tung-Ming Pan ; Fu-Chien Chiu</h2></div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Author_Institution</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>Chang Gung Univ., Taoyuan, Taiwan</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Volume</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>58</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Issue</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>11</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>fYear</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>2011</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Firstpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>3847</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Lastpage</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>3851</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Abstract</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>In this paper, we propose Al/SiO<sub>2</sub>/Dy<sub>2</sub>O<sub>3</sub>/ SiO<sub>2</sub>/ Si, Al/SiO<sub>2</sub>/DyTi<sub>x</sub>O<sub>y</sub>/SiO<sub>2</sub>/Si, and Al/Al<sub>2</sub>O<sub>3</sub>/DyTi<sub>x</sub>O<sub>y</sub>/SiO<sub>2</sub>/Si as charge-trapping memory devices incorporating high-<i>k</i> Dy<sub>2</sub>O<sub>3</sub> and Ti-doped Dy<sub>2</sub>O<sub>3</sub> films as charge-trapping layers, and SiO<sub>2</sub> and Al<sub>2</sub>O<sub>3</sub> films as blocking layers. The Al/Al<sub>2</sub>O<sub>3</sub>/DyTi<sub>x</sub> O<sub>y</sub>/ SiO<sub>2</sub>/Si memory device exhibited a larger memory window of ~4.5 V (measured at a sweep voltage range of ±9 V), a smaller charge loss of ~20% (measured time up to 10<sup>6</sup>s and at 85<sup>°</sup>C), and better endurance (program/erase cycles up to 10<sup>4</sup>) than other devices. These results suggest higher probability for trapping the charge carrier due to the Ti content in the Dy<sub>2</sub>O<sub>3</sub> film, which produce a high dielectric constant and suppress the formation of the Dy-silicate layer, and create a deep trap level in the DyTi<sub>x</sub>O<sub>y</sub> film.</div></div> </li> <li class='list-group-item border-0 py-3 px-0'> <div class='row g-0 align-items-center mb-2'><div class='col-12 col-md-3 fullRecLabelEnglish fw-bold mb-2 mb-md-0'><span class='text-muted small'>Keywords</span></div><div class='col-12 col-md-9 leftDirection leftAlign'>MOS memory circuits; alumina; dysprosium compounds; elemental semiconductors; high-k dielectric thin films; permittivity; silicon; silicon compounds; titanium compounds; Al-Al<sub>2</sub>O<sub>3</sub>-DyTi<sub>x</sub>O<sub>y</sub>-SiO<sub>2</sub>-Si; Dy-silicate layer; Dy<sub>2</sub>O<sub>3</sub>:Ti; blocking layer; charge carrier trapping probability; charge-trapping layer; charge-trapping memory devices; deep trap level; high dielectric constant; metal-oxide-high-k -oxide-silicon memory device; Aluminum oxide; Educational institutions; Electron traps; Logic gates; Silicon; Tunneling; <formula formulatype=$hbox{Al}_{2}hbox{O}_{3}$; $hbox{Dy}_{2}hbox{O}_{3}$ ; Ti-doped $ hbox{Dy}_{2}hbox{O}_{3}$; charge-trapping layer; nonvolatile memory;

  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2011.2165285
  • Filename
    6029978
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1335014