Title :
Buffer management for shared-memory ATM switches
Author :
Arpaci, Mutlu ; Copeland, John A.
Author_Institution :
Georgia Inst. of Technol., Atlanta, GA, USA
Abstract :
In the shared-memory switch architecture, output links share a single large memory, in which logical FIFO queues are assigned to each link. Although memory sharing can provide a better queuing performance than physically separated buffers, it requires carefully designed buffer management schemes for a fair and robust operation. This article presents a survey of the buffer management methods that have been proposed for shared-memory packet switches. Several buffer management policies are described, and their strengths and weaknesses are examined. The performances of various policies are evaluated using computer simulations. A comparison of the most important schemes is obtained with the help of the simulation results and the results provided in the literature. The survey concludes with a discussion of the possible future research areas related to shared-memory ATM switches.
Keywords :
asynchronous transfer mode; packet switching; buffer management; logical FIFO queues; memory sharing; shared-memory ATM switches; shared-memory packet switches; Asynchronous transfer mode; Packet switching; Performance evaluation; Read-write memory; Robustness; Routing; Samarium; Switches; Switching circuits; Technology management;
Journal_Title :
Communications Surveys & Tutorials, IEEE
DOI :
10.1109/COMST.2000.5340716