• DocumentCode
    1343583
  • Title

    Physical and Electrical Performance Limits of High-Speed Si GeC HBTs—Part II: Lateral Scaling

  • Author

    Schröter, Michael ; Krause, Julia ; Rinaldi, Niccolò ; Wedel, Gerald ; Heinemann, Bernd ; Chevalier, Pascal ; Chantre, Alain

  • Volume
    58
  • Issue
    11
  • fYear
    2011
  • Firstpage
    3697
  • Lastpage
    3706
  • Abstract
    The overall purpose of this paper is the prediction of the ultimate electrical high-frequency performance potential for SiGeC HBTs under the constraints of practical applications. This goal is achieved by utilizing advanced device simulation tools with parameters calibrated to experimental results of most advanced existing technologies. In addition, detailed electrostatic and electrothermal simulations are performed for determining the parasitic capacitances, temperature increase, and safe operating area of aggressively scaled devices. The important figures of merit are then determined from circuit simulation employing an accurate compact model incorporating all relevant physical effects. Based on the vertical profile found in Part I, this paper focuses on achieving a balanced device design by lateral scaling. It is shown that the peak values of (fT, fmax) around (1, 1.5) THz may be achievable. Such a performance limit provides still significant headroom for further developing existing processes and makes SiGeC HBTs well-suitable for highly integrated millimeter-wave applications operating within the low-end of the terahertz gap.
  • Keywords
    Ge-Si alloys; circuit simulation; heterojunction bipolar transistors; millimetre wave transistors; HBTs; SiGeC; advanced device simulation tool; circuit simulation; electrical performance limits; electrostatic simulation; electrothermal simulation; integrated millimeter-wave application; lateral scaling; parasitic capacitances; physical performance limits; terahertz gap; ultimate electrical high-frequency performance potential prediction; Capacitance; Current density; Mathematical model; Performance evaluation; Resistance; Semiconductor process modeling; Transistors; SiGeC heterojunction bipolar transistor (HBT) device scaling; device simulation; high-performance bipolar technology; physical limits;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2011.2163637
  • Filename
    6036168