The effects of electrical stress and temperature on the properties of polycrystalline silicon thin-film transistors fabricated by metal induced lateral crystallization

Author

Kim, Tae-Kyung ; Kim, Gi-Bum ; Lee, Byung-Il ; Joo, Seung-Ki

Author_Institution

Sch. of Mater. Sci. & Eng., Seoul Nat. Univ., South Korea

Volume

21

Issue

7

fYear

2000

fDate

7/1/2000 12:00:00 AM

Firstpage

347

Lastpage

349

Abstract

An asymmetric Ni-offset method was proposed to improve the electrical properties of poly-Si thin-film transistors (TFTs) fabricated by metal-induced lateral crystallization (MILC). The MILC/MILC boundary, which was inevitably located within the channel when formed by symmetric Ni-offset, could be successfully extracted from channel region by new asymmetric Ni-offset method. Therefore, thus fabricated TFTs showed lower leakage current and better thermal stability than symmetric Ni-offset TFTs. In addition, the effects of electrical stress and temperature on the electrical properties of symmetric/asymmetric Ni-offset TFTs were investigated.

Keywords

MOSFET; crystallisation; elemental semiconductors; leakage currents; nickel; semiconductor device metallisation; silicon; thermal stability; thin film transistors; Ni-SiO/sub 2/-Si; asymmetric Ni-offset method; electrical properties; electrical stress effects; leakage current; metal induced lateral crystallization; poly-Si TFTs; polycrystalline Si; polysilicon TFTs; symmetric Ni-offset TFT; temperature effects; thermal stability; thin-film transistors; Active matrix liquid crystal displays; Crystallization; Glass; Leakage current; Microwave integrated circuits; Silicon; Substrates; Temperature; Thermal stresses; Thin film transistors;

fLanguage

English

Journal_Title

Electron Device Letters, IEEE

Publisher

ieee

ISSN

0741-3106

Type

jour

DOI

10.1109/55.847376

Filename

847376