Title :
A 0.13 μm poly-SiGe gate CMOS technology for low-voltage mixed-signal applications
Author :
Ponomarev, Youri V. ; Stolk, Peter A. ; Dachs, Charles J J ; Montree, André H.
Author_Institution :
Philips Res. Lab., Eindhoven, Netherlands
fDate :
7/1/2000 12:00:00 AM
Abstract :
We present here a novel approach to CMOS fabrication based on advanced lateral channel doping profiling technique coupled to gate workfunction engineering. The performance of this technology for both digital and analog applications is evaluated in detail to illustrate that it satisfies the requirements for mixed digital-analog circuitry. The use of asymmetric source/drain lateral profiles proves to be especially beneficial to analog applications
Keywords :
CMOS integrated circuits; Ge-Si alloys; doping profiles; low-power electronics; mixed analogue-digital integrated circuits; semiconductor materials; 0.13 micron; SiGe; asymmetric source/drain lateral profiles; gate workfunction engineering; lateral channel doping profiling technique; low-voltage mixed-signal applications; mixed digital-analog circuitry; poly-gate CMOS technology; Analog circuits; CMOS technology; CMOSFETs; Coupling circuits; Digital-analog conversion; Doping; Fabrication; Leakage current; MOS devices; Voltage control;
Journal_Title :
Electron Devices, IEEE Transactions on
