Title :
A CMOS four-quadrant analog multiplier with single-ended voltage output and improved temperature performance
Author_Institution :
Dept. of Electr. Eng., Swiss Federal Inst. of Technol., Zurich, Switzerland
fDate :
9/1/1991 12:00:00 AM
Abstract :
An all-MOS, four-quadrant analog multiplier with single-ended voltage output and good temperature performance is presented. It is based on a linear MOS transconductor with extended operation range to four quadrants and on a linear MOS resistor. The temperature behavior of the multiplier is improved by a factor of 10. The multiplier was realized using a 3-μm p-well self-aligned contact CMOS (SACMOS) process. A linearity better than 1% for each of the input voltages of 5 Vp-p, a bandwidth from DC to 1.2 MHz, and output noise 73 dB below full scale were achieved. The active chip area is 210 mil2 and power consumption is 6 mW. A new approach for implementing a temperature-independent analog multiplier is proposed
Keywords :
CMOS integrated circuits; analogue computer circuits; linear integrated circuits; multiplying circuits; 0 to 1.2 MHz; 1.2 MHz; 3 micron; 5 V; 6 mW; SACMOS process; four-quadrant analog multiplier; linear MOS resistor; linear MOS transconductor; p-well self-aligned contact CMOS; single-ended voltage output; temperature independent multiplier; temperature performance; CMOS technology; Character generation; Circuits; Linearity; MOSFETs; Resistors; Temperature dependence; Transconductance; Transconductors; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of
