DocumentCode :
1360816
Title :
Four-quadrant multiplier using junction field-effect transistors
Author :
Ciubotaru, A.A.
Author_Institution :
Dept. of Electr. Eng., Texas Univ., Arlington, TX, USA
Volume :
33
Issue :
15
fYear :
1997
fDate :
7/17/1997 12:00:00 AM
Firstpage :
1270
Lastpage :
1271
Abstract :
A simple four-quadrant multiplier which requires no DC power supply is presented. The multiplication is ensured by four matched symmetrical junction field-effect transistors operating in the triode region. The circuit is compatible with current integrated-circuit technologies
Keywords :
JFET circuits; analogue multipliers; four-quadrant multiplier; junction FETs; junction field-effect transistors; matched symmetrical JFETs; triode region operation;
fLanguage :
English
Journal_Title :
Electronics Letters
Publisher :
iet
ISSN :
0013-5194
Type :
jour
DOI :
10.1049/el:19970882
Filename :
606044
Link To Document :
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