• DocumentCode
    1360907
  • Title

    Design of fault-tolerant ATM switch based on parallel architecture

  • Author

    Segkhoonthod, S. ; Sinclair, M.C.

  • Author_Institution
    Dept. of Electron. Syst. Eng., Essex Univ., Colchester, UK
  • Volume
    33
  • Issue
    15
  • fYear
    1997
  • fDate
    7/17/1997 12:00:00 AM
  • Firstpage
    1289
  • Lastpage
    1290
  • Abstract
    A fault-tolerant ATM switch comprising a distribution network and several routing networks in parallel is proposed. As the distribution network carries out part of the routing process, the routing networks are truncated, giving low overall complexity. A performance evaluation of the switch is presented. The switch outperforms replicated networks but requires lower complexity
  • Keywords
    asynchronous transfer mode; electronic switching systems; fault tolerant computing; multistage interconnection networks; parallel architectures; performance evaluation; telecommunication network routing; complexity reduction; distribution network; fault-tolerant ATM switch; parallel architecture; performance evaluation; truncated routing networks;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19970865
  • Filename
    606057
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1360907