Title :
11.3 Gbps CMOS SONET Compliant Transceiver for Both RZ and NRZ Applications
Author :
Kocaman, Namik ; Garg, Adesh ; Raghavan, Bharath ; Cui, Delong ; Vasani, Anand ; Tang, Keith ; Pi, Deyi ; Tong, Haitao ; Fallahi, Siavash ; Zhang, Wei ; Singh, Ullas ; Cao, Jun ; Zhang, Bo ; Momtaz, Afshin
Author_Institution :
Broadcom Corp., Irvine, CA, USA
Abstract :
In this paper, an 11.3 Gbps CMOS SONET compliant transceiver designed to work in both RZ and NRZ data formats is presented. Using a configurable high-speed transmit path utilizing an AND gate and a duty cycle adjustment circuit, the transmitter can switch output format between RZ and NRZ. The TX driver exhibits 17 ps rise/fall times, 0.25 psrms RJ, and 2 pspp DJ. In RZ mode, TX output duty cycle can be adjusted within 40-60% range. To improve input sensitivity in both RZ and NRZ reception, the receiver incorporates a limiting amplifier with a distributed threshold adjustment circuit. It achieves 5 mVpp-diff RX input sensitivity with 0.54 UI high-frequency jitter tolerance. An adaptation scheme based on nested linear search is implemented to control the distributed threshold adjustment circuit. While demonstrating the integration of RZ/NRZ functionality into a single-chip solution using 65 nm CMOS technology, the transceiver core occupies 1.36 mm2 and consumes 214 mW.
Keywords :
CMOS integrated circuits; SONET; jitter; logic gates; optical transceivers; AND gate; CMOS SONET compliant transceiver; NRZ application; NRZ data format; RX input sensitivity; RZ application; RZ data format; RZ-NRZ functionality; configurable high-speed transmit path; cycle adjustment circuit; distributed threshold adjustment circuit; high-frequency jitter tolerance; power 214 mW; single-chip solution; size 65 nm; switch output format; transceiver core; transmitter; CMOS integrated circuits; Couplings; Logic gates; Optical signal processing; Resistors; SONET; Transceivers; CMOS integrated circuits; NRZ to RZ conversion; SONET OC-192; duty cycle adjustment; optical communication; return-to-zero (RZ); threshold adjustment;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2011.2169184