Phosphorus redistribution caused by electrical deactivation of phosphorus at low temperatures

Author

Ruey-Dar Chang ; Chih-Hung Lin ; Hong Lu ; Zhimin Wan

Author_Institution

Dept. of Electron. Eng., Chang Gung Univ., Taoyuan, Taiwan

fYear

2014

fDate

June 26 2014-July 4 2014

Firstpage

1

Lastpage

4

Abstract

Electrical deactivation of phosphorus was investigated using silicon-on-insulator (SOI) wafers with uniform phosphorus profiles prepared by ion implantation and annealing at high temperatures. Evident depletion of phosphorus was observed in the bulk region of the active silicon layer when electrical deactivation of phosphorus occurred at low temperatures. Such phenomenon was due to uphill diffusion of phosphorus toward the surface. Retrograde profiles of excess interstitials generated during deactivation were proposed to explain the redistribution of phosphorus.

Keywords

annealing; elemental semiconductors; high-temperature techniques; ion implantation; low-temperature techniques; phosphorus; silicon; silicon-on-insulator; P; SOI wafers; Si; active silicon layer; annealing; bulk region; electrical deactivation; excess interstitial retrograde profiles; high temperatures; ion implantation; low temperatures; phosphorus redistribution; silicon-on-insulator; uniform phosphorus profiles; Annealing; Boron; Hall effect; Implants; Resistance; Silicon; Temperature measurement; deactivation; diffusion; interstitial; phosphorus; silicon-on-insulator;

fLanguage

English

Publisher

ieee

Conference_Titel

Ion Implantation Technology (IIT), 2014 20th International Conference on

Conference_Location

Portland, OR

Type

conf

DOI

10.1109/IIT.2014.6940001

Filename

6940001