DocumentCode
1363379
Title
Computational complexity of controllability/observability problems for combinational circuits
Author
Fujiwara, Hideo
Author_Institution
Dept. of Comput. Sci., Meiji Univ., Kawasaki, Japan
Volume
39
Issue
6
fYear
1990
fDate
6/1/1990 12:00:00 AM
Firstpage
762
Lastpage
767
Abstract
The computational complexity of fault detection problems and various controllability and observability problems for combinational logic circuits are analyzed. It is shown that the fault detection problem is still NP-complete for monotone circuits limited in fanout, i.e. when the number of signal lines which can out from a signal line is limited to two. It is also shown that the observability problem for unate circuits is NP-complete, but that the controllability problem for unate circuits can be solved in time complexity O(m ), where m is the number of lines in a circuit. Two classes of circuits, called k -binate-bounded circuits and k -bounded circuits, are then introduced. For k -binate-bounded circuits the controllability problem is solvable in polynomial time, and for k -bounded circuits the fault detection problem is solvable in polynomial time, when k ⩽log p (m ) for some polynomial p (m ). The class of k -bounded circuits includes many practical circuits such as decoders, adders, one-dimensional cellular arrays, and two-dimensional cellular arrays
Keywords
combinatorial circuits; computational complexity; controllability; fault location; observability; NP-complete; combinational circuits; computational complexity; controllability; fault detection; k-binate-bounded circuits; k-bounded circuits; monotone circuits; observability; polynomial time; Adders; Circuit faults; Circuit testing; Combinational circuits; Computational complexity; Controllability; Electrical fault detection; Logic testing; Observability; Polynomials;
fLanguage
English
Journal_Title
Computers, IEEE Transactions on
Publisher
ieee
ISSN
0018-9340
Type
jour
DOI
10.1109/12.53597
Filename
53597
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