• DocumentCode
    1363395
  • Title

    Performance analysis of k-ary n-cube interconnection networks

  • Author

    Dally, William J.

  • Author_Institution
    Artificial Intelligence Lab., MIT, Cambridge, MA, USA
  • Volume
    39
  • Issue
    6
  • fYear
    1990
  • fDate
    6/1/1990 12:00:00 AM
  • Firstpage
    775
  • Lastpage
    785
  • Abstract
    VLSI communication networks are wire-limited, i.e. the cost of a network is not a function of the number of switches required, but rather a function of the wiring density required to construct the network. Communication networks of varying dimensions are analyzed under the assumption of constant wire bisection. Expressions for the latency, average case throughput, and hot-spot throughput of k-ary n -cube networks with constant bisection that agree closely with experimental measurements are derived. It is shown that low-dimensional networks (e.g. tori) have lower latency and higher hot-spot throughput than high-dimensional networks (e.g. binary n-cubes) with the same bisection width
  • Keywords
    VLSI; multiprocessor interconnection networks; VLSI communication networks; average case throughput; k-ary n-cube interconnection networks; low-dimensional networks; switches; Communication networks; Communication switching; Cost function; Delay; Performance analysis; Switches; Throughput; Very large scale integration; Wire; Wiring;
  • fLanguage
    English
  • Journal_Title
    Computers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9340
  • Type

    jour

  • DOI
    10.1109/12.53599
  • Filename
    53599