• DocumentCode
    1364043
  • Title

    Sources and transport mechanisms of gaseous impurities in vertical thermal reactors

  • Author

    Verma, Nishith K. ; Ma, Ce ; Shero, Eric ; Shadman, Farhang

  • Author_Institution
    BOC Syst. Manage. Oper., Murray Hill, NJ, USA
  • Volume
    9
  • Issue
    3
  • fYear
    1996
  • fDate
    8/1/1996 12:00:00 AM
  • Firstpage
    312
  • Lastpage
    319
  • Abstract
    This work focuses on the different mechanisms of impurity transport and distribution in process equipment, with particular emphasis on moisture distribution in vertical thermal reactors. The results are important in both control and metrology of gaseous impurities during startup and process cycles. In addition to direct measurements, a comprehensive theoretical model is developed which is useful for process parametric study to optimize the process parameters or improve the reactor design. The results show that the impurity purge during startup is controlled by the diffusion in the wafer spacing; this diffusion becomes a bottleneck for large wafers and high furnace loading. The major sources of impurities during the wafer introduction (wafer push) stage are backdiffusion, impurity diffusion from the wafer spacing and outgassing of wafers as they enter the reactor. The primary sources during operation are permeation through the quartz reactor walls and leakage, together with backdiffusion, from the furnace outlet gaskets. A constant source of impurity is permeation through the polymeric tubing and fittings commonly used on the inlet side of the furnace. The kinetics and the mechanisms of each of these sources are determined through a combination of experimental measurements and process simulation
  • Keywords
    diffusion; impurities; moisture; semiconductor process modelling; semiconductor technology; backdiffusion; diffusion; furnace; gaseous impurities; impurity purge; impurity sources; impurity transport; kinetics; moisture distribution; outgassing; permeation; process simulation; semiconductor process equipment; startup; vertical thermal reactor; wafer push; Design optimization; Furnaces; Gaskets; Impurities; Inductors; Metrology; Moisture; Parametric study; Polymers; Semiconductor device modeling;
  • fLanguage
    English
  • Journal_Title
    Semiconductor Manufacturing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0894-6507
  • Type

    jour

  • DOI
    10.1109/66.536104
  • Filename
    536104