Title :
A bus controlled clock generator IC [for TV front end]
Author_Institution :
Siemens AG, Munich, Germany
fDate :
8/1/1991 12:00:00 AM
Abstract :
The author describes a line-locked clock generation circuit for digital video processing systems with a digital line-PLL (phase-locked loop) and a digital/analog clock-PLL. A virtual frequency twice that of a crystal is used
Keywords :
clocks; colour television receivers; digital signal processing chips; phase-locked loops; TV front end; bus controlled clock generator IC; digital line-PLL; digital video processing systems; digital/analog clock-PLL; Circuits; Clocks; Decoding; Frequency; Interference; Oscillators; Phase locked loops; Sampling methods; TV; Timing;
Journal_Title :
Consumer Electronics, IEEE Transactions on
