A 26.5 nJ/px 2.64 Mpx/s CMOS vision sensor for Gaussian pyramid extraction

Author

Suarez, M. ; Brea, V.M. ; Fernandez-Berni, J. ; Carmona-Galan, R. ; Cabello, D. ; Rodriguez-Vazquez, Angel

Author_Institution

Centro de Investig. en Tecnoloxias da Informacion (CITIUS), Univ. of Santiago de Compostela, Santiago de Compostela, Spain

fYear

2014

fDate

22-26 Sept. 2014

Firstpage

311

Lastpage

314

Abstract

This paper introduces a CMOS vision sensor to extract the Gaussian pyramid with an energy cost of 26.5 nJ/px at 2.64 Mpx/s, thus outperforming conventional solutions employing an imager and a separate digital processor. The chip, manufactured in a 0.18 μm CMOS technology, consists of an arrangement of 88 × 60 processing elements (PEs) which captures images of 176 × 120 resolution and performs concurrent parallel processing right at pixel level. The Gaussian pyramid is generated by using a switched-capacitor network. Every PE includes four photodiodes, four MiM capacitors, one 8-bit single-slope ADC and one CDS circuit, occupying 44 × 44 μm². Suitability of the chip is assessed by using metrics pertaining to visual tracking.

Keywords

CMOS image sensors; Gaussian processes; image resolution; switched capacitor networks; CDS circuit; CMOS vision sensor; Gaussian pyramid extraction; Gaussian pyramid generation; MiM capacitor; PE; concurrent parallel processing; digital processor; image resolution; photodiode; processing element; single-slope ADC; size 0.18 mum; switched-capacitor network; visual tracking; word length 8 bit; CMOS integrated circuits; Capacitors; Computer architecture; Feature extraction; Inverters; System-on-chip; Visualization;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th

Conference_Location

Venice Lido

ISSN

1930-8833

Print_ISBN

978-1-4799-5694-4

Type

conf

DOI

10.1109/ESSCIRC.2014.6942084

Filename

6942084