A linear 28nm CMOS digital transmitter with 2×12bit up to LO baseband sampling and −58dBc C-IM3

Author

Ingels, M. ; Xiaoqiang Zhang ; Raczkowski, Kuba ; Sungwoo Cha ; Palmers, Pieter ; Craninckx, Jan

Author_Institution

IMEC, Leuven, Belgium

fYear

2014

fDate

22-26 Sept. 2014

Firstpage

379

Lastpage

382

Abstract

This paper presents a 1.2-2.6GHz 2×12 bit Direct Digital RF Modulator (DDRM) realized in 28nm CMOS. The digital cartesian transmitter features baseband sampling speeds up to LO. The intrinsically linear architecture features current-mode operation at 25% duty cycle, which requires less predistortion than existing digital transmitters. The applied digital intensive LO modulation reduces the power consumption of the LO distribution. Except for the output stage at 1.8V, the modulator is powered from 0.9V supply. The DDRM features an OP1dB of 15.5dBm. At 3.9dBm output power, the un-calibrated C-IM3 is better than -42dBc, while the image is below -49dBc. With a simple 1D calibration the C-IM3 can easily be improved to below -58dBc. The modulator´s peak drain efficiency at 17.5dBm is 34%.

Keywords

CMOS digital integrated circuits; calibration; current-mode circuits; modulation; modulators; radio transmitters; radiofrequency integrated circuits; C-IM3; CMOS digital cartesian transmitter; DDRM; LO baseband sampling speed; current-mode operation; digital RF modulator; digital intensive LO modulation; efficiency 34 percent; frequency 1.2 GHz to 2.6 GHz; peak drain efficiency; predistortion; simple 1D calibration; size 28 nm; voltage 0.9 V; voltage 1.8 V; Baseband; CMOS integrated circuits; Frequency measurement; Modulation; Noise; Radio frequency; Transmitters; C-IM3; DDRM; Digital Transmitter; RF DAC;

fLanguage

English

Publisher

ieee

Conference_Titel

European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th

Conference_Location

Venice Lido

ISSN

1930-8833

Print_ISBN

978-1-4799-5694-4

Type

conf

DOI

10.1109/ESSCIRC.2014.6942101

Filename

6942101