DocumentCode
137384
Title
A 13b SAR ADC with eye-opening VCO based comparator
Author
Yoshioka, Kazuaki ; Ishikuro, Hiroki
Author_Institution
Keio Univ., Yokohama, Japan
fYear
2014
fDate
22-26 Sept. 2014
Firstpage
411
Lastpage
414
Abstract
A low-power and high accuracy comparator based on voltage controlled ring-oscillator (VCO) is presented. By using the dead zone of phase detector effectively, the VCO comparator automatically changes its noise level depending on the input voltage level (Δvin). When Δvin is large, the comparator operates as a low-power delay-line based comparator. On the other hand, when Δvin is small, the VCO is enabled and eye is opened during the oscillation. This suppress input referred noise and enables accurate conversion. The number of oscillation cycle for one comparison is inversely proportional to Δvin and adaptive noise reduction is realized. The VCO comparator does not require any sort of tuning. A 13b SAR ADC with proposed VCO based comparator was fabricated in 65-nm CMOS. By off-chip LMS calibration, the ADC achieves SNDR 66 dB at 1 MS/s with FoM of 29fJ/conv.-step.
Keywords
CMOS digital integrated circuits; analogue-digital conversion; calibration; comparators (circuits); delay lines; integrated circuit noise; low-power electronics; phase detectors; voltage-controlled oscillators; 13B SAR ADC; CMOS technology; adaptive noise reduction; dead zone; eye-opening VCO-based comparator; input referred noise suppression; low-power delay-line based comparator; off-chip LMS calibration; phase detector; size 65 nm; voltage controlled ring-oscillator; word length 13 bit; Calibration; Detectors; Jitter; Least squares approximations; Noise; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
European Solid State Circuits Conference (ESSCIRC), ESSCIRC 2014 - 40th
Conference_Location
Venice Lido
ISSN
1930-8833
Print_ISBN
978-1-4799-5694-4
Type
conf
DOI
10.1109/ESSCIRC.2014.6942109
Filename
6942109
Link To Document