DocumentCode :
1383079
Title :
Automatic utilization of hierarchical memories
Author :
Anderson, J. P. ; Glaser, E. L.
Author_Institution :
Burroughs Corporation, Paoli, Pa.
Volume :
82
Issue :
2
fYear :
1963
fDate :
5/1/1963 12:00:00 AM
Firstpage :
288
Lastpage :
292
Abstract :
Kilomegacycle computers will be achieved only partly by high-speed components, memories, and logics. For some time to come, speed will be derived substantially from system organization. In the final analysis, memory speed will become of primary importance in obtainable system size, and cost will prevent very large high-speed memories from matching kilomegacycle logic. This leads to consideration of hierarchies of memory. A systems basis for utilizing hierarchical memories, giving the effect of homogeneous memory systems, is presented.
Keywords :
Arrays; Computers; Control systems; Encoding; Inductors; Memory management; Registers;
fLanguage :
English
Journal_Title :
American Institute of Electrical Engineers, Part I: Communication and Electronics, Transactions of the
Publisher :
ieee
ISSN :
0097-2452
Type :
jour
DOI :
10.1109/TCE.1963.6373391
Filename :
6373391
Link To Document :
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