• DocumentCode
    1389563
  • Title

    Parallel Logic Simulation: Myth or Reality?

  • Author

    Chang, Kai-Hui ; Browy, Chris

  • Author_Institution
    Avery Design Syst., Andover, MA, USA
  • Volume
    45
  • Issue
    4
  • fYear
    2012
  • fDate
    4/1/2012 12:00:00 AM
  • Firstpage
    67
  • Lastpage
    73
  • Abstract
    The rapid adoption of multiprocessor computers creates a perfect environment for parallel EDA algorithms. Among various EDA applications, parallel logic simulation seems the most promising. As processors become faster and designs grow larger, better performance might well be expected from parallel simulation. However, this is typically not the case. Speedup is difficult to achieve, and pitfalls in evaluating simulation speedup can offer false promises. Is parallel logic simulation a myth or reality? In this article, the authors answer this question from the perspective of an industrial parallel simulation vendor.
  • Keywords
    multiprocessing systems; parallel algorithms; multiprocessor computers; parallel EDA algorithm; parallel logic simulation; parallel simulation; Central Processing Unit; Computational modeling; IP networks; Mathematical model; Multiprocessing systems; Parallel processing; Program processors; logic simulation; parallel processing; parallel simulation;
  • fLanguage
    English
  • Journal_Title
    Computer
  • Publisher
    ieee
  • ISSN
    0018-9162
  • Type

    jour

  • DOI
    10.1109/MC.2011.385
  • Filename
    6095487