Title :
Analogue squarer and multiplier based on floating-gate MOS transistors
Author :
Vlassis, S. ; Siskos, S.
Author_Institution :
Dept. of Phys., Aristotelian Univ. of Thessaloniki, Greece
fDate :
4/30/1998 12:00:00 AM
Abstract :
A simple squarer based on floating-gate MOS transistors is presented. The squarer has rail-to-rail input range with less than 0.5% non-linearity error. Using this squarer single-ended and/or differential signals can be processed without additional circuitry. Also, a four quadrant analogue multiplier can be realised using the proposed squarer. Simulation results are given to verify the theoretical analysis
Keywords :
CMOS analogue integrated circuits; analogue multipliers; analogue processing circuits; CMOS; analogue squarer; differential signals; floating-gate MOS transistors; four quadrant analogue multiplier; nonlinearity error; rail-to-rail input range; single-ended signals;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19980639
