Title :
Efficient CODEC Designs for Crosstalk Avoidance Codes Based on Numeral Systems
Author :
Wu, Xuebin ; Yan, Zhiyuan
Author_Institution :
Dept. of Electr. & Comput. Eng., Lehigh Univ., Bethlehem, PA, USA
fDate :
4/1/2011 12:00:00 AM
Abstract :
Low-complexity CODECs for two classes of crosstalk avoidance codes (CACs), forbidden pattern codes (FPCs) and forbidden transition codes (FTCs), have been recently proposed based on Fibonacci-based binary numeral system. In this paper, we first generalize this idea and establish a generic framework for the CODEC design of all classes of CACs based on binary mixed-radix numeral systems. Using this framework, we then propose novel CODEC designs for three important classes of CACs, one lambda codes (OLCs), FPCs, and forbidden overlapping codes (FOCs). Our CODEC designs have area complexity and delay that increase quadratically with the size of the bus, while achieving optimal or nearly optimal code rates. Our CODECs also have simple and regular circuitry, and can easily achieve very high throughput by pipelining. Our efficient CODECs, used with such techniques as partial coding, help to make CACs a practical option in combating crosstalk delay, which is a bottleneck in deep submicrometer system-on-chip designs.
Keywords :
Fibonacci sequences; codecs; codes; crosstalk; integrated circuit design; system-on-chip; Fibonacci-based binary numeral system; binary mixed-radix numeral systems; crosstalk avoidance codes; crosstalk delay; deep submicrometer system-on-chip designs; forbidden overlapping codes; forbidden pattern codes; forbidden transition codes; lambda codes; low-complexity CODEC designs; partial coding; CODEC; crosstalk avoidance codes (CACs); interconnect; numeral systems; on-chip bus;
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
DOI :
10.1109/TVLSI.2009.2038389