DocumentCode :
1393936
Title :
Image and video processing platform for field programmable gate arrays using a high-level synthesis
Author :
Desmouliers, C. ; Oruklu, Erdal ; Aslan, S. ; Saniie, Jafar ; Vallina, F.M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
Volume :
6
Issue :
6
fYear :
2012
fDate :
11/1/2012 12:00:00 AM
Firstpage :
414
Lastpage :
425
Abstract :
In this study, an image and video processing platform (IVPP) based on field programmable gate array (FPGAs) is presented. This hardware/software co-design platform has been implemented on a Xilinx Virtex-5 FPGA using a high-level synthesis and can be used to realise and test complex algorithms for real-time image and video processing applications. The video interface blocks are done in Register Transfer Languages and can be configured using the MicroBlaze processor allowing the support of multiple video resolutions. The IVPP provides the required logic to easily plug-in the generated processing blocks without modifying the front-end (capturing video data) and the back-end (displaying processed output data). The IVPP can be a complete hardware solution for a broad range of real-time image/video processing applications including video encoding/decoding, surveillance, detection and recognition.
Keywords :
field programmable gate arrays; hardware-software codesign; high level synthesis; image resolution; video surveillance; FPGA; IVPP; MicroBlaze processor; Xilinx Virtex-5 FPGA; complete hardware solution; field programmable gate arrays; hardware/software co-design platform; high-level synthesis; image and video processing platform; register transfer languages; video decoding; video detection; video encoding; video interface; video recognition; video resolutions; video surveillance;
fLanguage :
English
Journal_Title :
Computers & Digital Techniques, IET
Publisher :
iet
ISSN :
1751-8601
Type :
jour
DOI :
10.1049/iet-cdt.2011.0156
Filename :
6403645
Link To Document :
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