Linearization of dual-input Doherty power amplifiers

This paper studies the linearity of dual-input Doherty power amplifiers. We propose a linearization scheme that uses a combination of an efficiency-optimized static splitter and a vector-switched digital predistorter. The performance of the proposed linearization scheme is evaluated on a dual-input Doherty power amplifier operating at 2.0 GHz with 42 dBm peak output power. Experimental results show that the proposed linearization scheme achieves a normalized mean square error of -43.7 dB and an adjacent channel power ratio of -55.8 dBc with a power added efficiency of 42.4%.