An FPGA-based digital predistorter for RF power amplifier linearization using cross-memory polynomial model

Author

Cunha, G.C.L. ; Farsi, S. ; Nauwelaers, B. ; Schreurs, Dominique

Author_Institution

Electr. Eng. Dept., KU Leuven, Leuven, Belgium

fYear

2014

fDate

2-4 April 2014

Firstpage

1

Lastpage

3

Abstract

A cost-effective and flexible FPGA-based system architecture for digital predistortion (DPD) based linearization of power amplifiers (PAs) is proposed. The system is used to show the effectiveness of the cross-memory polynomial model (CMPM) for DPD. Two commercial amplifiers are linearized using single and two-carrier Wideband Code Division Multiple Access (WCDMA) signals as excitation and the performance of CMPM for DPD is compared to those of the memory polynomial (MPM) and memoryless models (MLM).

Keywords

UHF amplifiers; code division multiple access; field programmable gate arrays; linearisation techniques; power amplifiers; FPGA based digital predistorter; RF power amplifier linearization; WCDMA; cross memory polynomial model; digital predistortion; wideband code division multiple access; Field programmable gate arrays; Integrated circuit modeling; Multiaccess communication; Polynomials; Power amplifiers; Radio frequency; Spread spectrum communication; Digital predistortion; FPGA; cross-memory polynomial model; linearization; power amplifier;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Nonlinear Microwave and Millimetre-wave Circuits (INMMiC), 2014 International Workshop on

Conference_Location

Leuven

Type

conf

DOI

10.1109/INMMIC.2014.6815089

Filename

6815089