Soft Error and Soft Delay Mitigation Using Dynamic Threshold Technique

When designers try to address increasing power consumption reduction via optimizations, they need to be aware of the impact on single event robustness. In this work, we examined dynamic threshold MOS-based (DTMOS) schemes for their soft error and soft delay tolerance. Among techniques we considered, the standard DTMOS technique showed the best characteristics in terms of SEU robustness due to increased current drive. We have found that the standard DTMOS technique can be successfully combined with driver sizing approach in mitigating single event transient and soft delay effects. This combined approach results in considerable savings in area compared to driver sizing alone. This is possible since the standard DTMOS gate is more robust to radiation transients compared to a conventional one due to increased critical charge.