Title :
A high-speed conditional carry select (CCS) adder circuit with a successively incremented carry number block (SICNB) structure for low-voltage VLSI implementation
Author :
Huang, Yen-Mou ; Kuo, James B.
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fDate :
10/1/2000 12:00:00 AM
Abstract :
Owing to the successively-incremented-carry-number block (SICNB) structure, the new 16-bit SICNB CCS adder provides a 37% faster speed as compared to the conventional conditional carry select adder based on the SPICE results
Keywords :
SPICE; VLSI; adders; carry logic; circuit simulation; high-speed integrated circuits; low-power electronics; 16 bit; SICNB CCS adder; SPICE results; high-speed conditional carry select adder; low-voltage VLSI implementation; speed; successively incremented carry number block; Adders; Carbon capture and storage; Central Processing Unit; Circuits; Councils; Equations; SPICE; Signal generators; Signal processing; Very large scale integration;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
