Design of CMOS circuits

The author presents a formal approach to the design of optimal CMOS networks by means of pass logic design techniques. Two approaches are given: one for CMOS pass networks and the other for CMOS gate networks. First, an overview of pass networks is given, and then methods for the design of optimal CMOS pass networks are presented. Different approaches are then presented for the design of CMOS gate networks. The designer is thus provided with a number of choices. The design of CMOS complementary logic, pseudo-nMOS logic, dynamic logic and domino CMOS uses the minterms and maxterms separately to form the network function, whereas cascode voltage switch logic (CVSL) uses them together. Finally, it is shown that optimal CVSL networks may not always be the best choice in terms of switching speed