Title :
Thermal mapping of interconnects subjected to brief electrical stresses
Author :
Ju, Y.S. ; Goodson, K.E.
Author_Institution :
Dept. of Mech. Eng., Stanford Univ., CA, USA
Abstract :
The failure of metal interconnects subjected to brief electrical-current pulses is a reliability concern for the integrated circuits industry, especially in connection with electrostatic discharge (ESD). Since the magnitude and spatial distribution of the temperature rise during pulsing events strongly influence these failures, the development of suitable thermometry techniques is needed to understand the failure. This work reports scanning laser-reflectance thermometry with a novel calibration procedure, which captures transient temperature distributions along interconnects subjected to sub-microsecond current pulses. The temperature distribution is strongly affected by corners and contact pads and by the pulse duration.
Keywords :
VLSI; calibration; failure analysis; integrated circuit interconnections; integrated circuit measurement; integrated circuit reliability; measurement by laser beam; reflectivity; spectral methods of temperature measurement; temperature distribution; transient analysis; 200 ns; ESD; VLSI circuits; brief electrical-current pulses; calibration procedure; contact pads; corners; failure; integrated circuits industry; metal interconnects; reliability concern; scanning laser-reflectance thermometry; sub-microsecond current pulses; temperature rise distribution; temperature rise magnitude; thermal mapping; thermometry techniques; transient temperature distributions; Calibration; Electric resistance; Electrostatic discharge; Integrated circuit interconnections; Metallization; Optical interconnections; Temperature distribution; Thermal stresses; Thermoreflectance; Very large scale integration;
Journal_Title :
Electron Device Letters, IEEE