DocumentCode :
1402629
Title :
Design of an array processor for parallel skeletonization of images
Author :
Bourbakis, Nikolaos ; Steffensen, Nils ; Saha, Bikram
Author_Institution :
Binghampton Univ., NY, USA
Volume :
44
Issue :
4
fYear :
1997
fDate :
4/1/1997 12:00:00 AM
Firstpage :
284
Lastpage :
298
Abstract :
This paper presents the design, evaluation, and the implementation of an application specific array processor (ASAP) desirable for high speed parallel skeletonization of binary images. The array processor receives the input image in a binary form and generates the skeleton of the nonzero regions (objects, or silhouettes) contained in the image in parallel. In particular, each processing element (PE) of the array processor receives additional information from the neighboring PE´s and executes independently its own algorithm by maintaining or zeroing its own value “1” for the final generation of the skeleton of the object, The skeletons produced by this array processor are: (1) region´s size independent (nonsensitive in small variation of shape) and (2) sensitive to the region´s shape. The ability of the array processor to produce these two types of skeleton makes it flexible for image processing applications such as handwritten character recognition under uncertainty (non sensitive skeleton), or detection of defects on printing circuits (sensitive skeleton). A comparison of the proposed algorithm [parallel symmetric thinning algorithm (PSTA)] to a number of other parallel thinning algorithms is also provided indicating its advantages and disadvantages
Keywords :
image processing; image processing equipment; parallel algorithms; parallel architectures; special purpose computers; application specific array processor; array processor design; binary images; defects detection; handwritten character recognition; high speed skeletonization; image processing applications; parallel skeletonization; parallel symmetric thinning algorithm; printing circuits; Character recognition; Flexible printed circuits; Image processing; Inspection; Iterative algorithms; Parallel algorithms; Printing; Shape; Skeleton; Uncertainty;
fLanguage :
English
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
Publisher :
ieee
ISSN :
1057-7130
Type :
jour
DOI :
10.1109/82.566645
Filename :
566645
Link To Document :
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