Title :
A variable-frequency parallel I/O interface with adaptive power-supply regulation
Author :
Wei, Gu-Yeon ; Kim, Jaeha ; Liu, Dean ; Sidiropoulos, Stefanos ; Horowitz, Mark A.
Author_Institution :
Comput. Syst. Lab., Stanford Univ., CA, USA
Abstract :
This paper presents a low-power high-speed CMOS signaling interface that operates off of an adaptively regulated supply. A feedback loop adjusts the supply voltage on a chain of inverters until the delay through the chain is equal to half of the input period. This voltage is then distributed to the I/O subsystem through an efficient switching power-supply regulator. Dynamically scaling the supply with respect to frequency leads to a simple and robust design consisting mostly of digital CMOS gates, while enabling maximum energy efficiency. The interface utilizes high-impedance drivers for operation across a wide range of voltages and frequencies, a dual-loop delay-locked loop for accurate timing recovery, and an input receiver whose bandwidth tracks with the I/O frequency to filter out high-frequency noise. Test chips fabricated in a 0.35-/spl mu/m CMOS technology achieve transfer rates of 0.2-1.0 Gb/s/pin with a regulated supply ranging from 1.3-3.2 V.
Keywords :
CMOS logic circuits; delay lock loops; high-speed integrated circuits; low-power electronics; parallel architectures; switched mode power supplies; voltage regulators; 0.2 to 1 Gbit/s; 0.35 mum; 1.3 to 3.2 V; CMOS technology; I/O frequency; I/O subsystem; adaptive power-supply regulation; adaptively regulated supply; bandwidth tracking; digital CMOS gates; dual-loop delay-locked loop; dynamic scaling; feedback loop; high-frequency noise filtering; high-impedance drivers; input receiver; inverter chain; low-power high-speed CMOS signaling interface; maximum energy efficiency; robust design; source-synchronous parallel link architecture; supply voltage adjustment; switching power-supply regulator; timing recovery; transfer rates; variable-frequency parallel I/O interface; CMOS technology; Delay; Energy efficiency; Feedback loop; Frequency; Inverters; Regulators; Robustness; Timing; Voltage;
Journal_Title :
Solid-State Circuits, IEEE Journal of