DocumentCode :
1407026
Title :
Alpha-particle-induced hard error mechanism in DRAMs
Author :
Kurosawa, Hiroyuki ; Iwai, Hisato ; Ishihara, Manabu
Author_Institution :
Hitachi Ltd., Tokyo
Volume :
35
Issue :
12
fYear :
1988
fDate :
12/1/1988 12:00:00 AM
Firstpage :
2432
Lastpage :
2433
Abstract :
It has been confirmed experimentally that α-particle irradiation induces a leakage current increase at n+-particle junctions in a cell. The current has two modes, one due to the interface-trapped charge in the LOCOS (local oxidation of silicon) surface and the other to defects in the silicon substrate; the former is about 1.5 times larger than the latter. This phenomenon is observed using a plane, striped (4-μm width and 2-μm width) N+-p junction diodes. The rate of current increase on the LOCOS surface is 0.32 fA/μ-h and the one in the silicon substrate is 0.22 fA/μm2-h irradiation with 90-μm Ci241 Am. The former is influenced by the interface-trapped charge, while the latter depends on the substrate defects. From the experimental data, the error rate of a 4-Mb DRAM (dynamic random-access memory) is estimated to be less than 1 FIT in an ordinary environment. While this is negligible, further attention is necessary for scaling down DRAM storage charge size or for use in severe environments such as in atomic reactors or outer space
Keywords :
MOS integrated circuits; alpha-particle effects; integrated circuit testing; integrated memory circuits; leakage currents; random-access storage; α-particle irradiation; 4 Mbit; LOCOS surface; Si substrate; Si-SiO2; defects; error rate; hard error mechanism; interface-trapped charge; leakage current; n+-particle junctions; Boron; Current measurement; Diodes; Ion implantation; Laboratories; Leakage current; Random access memory; Research and development; Silicon; Very large scale integration;
fLanguage :
English
Journal_Title :
Electron Devices, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9383
Type :
jour
DOI :
10.1109/16.8839
Filename :
8839
Link To Document :
بازگشت