• DocumentCode
    1407442
  • Title

    Optimization of silicon-germanium TFT´s through the control of amorphous precursor characteristics

  • Author

    Subramanian, Vivek ; Saraswat, Krishna C.

  • Author_Institution
    Dept. of Electr. Eng., Stanford Univ., CA, USA
  • Volume
    45
  • Issue
    8
  • fYear
    1998
  • fDate
    8/1/1998 12:00:00 AM
  • Firstpage
    1690
  • Lastpage
    1695
  • Abstract
    Polycrystalline thin-film transistors (TFT´s) are promising for use as high-performance pixel and integrated driver transistors for active matrix liquid crystal displays (AMLCD´s). Silicon-germanium is a promising candidate for use as the channel material due to its low thermal budget requirements. The binary nature of the silicon-germanium system complicates the optimization of the channel deposition conditions. To date, little work has been done to perform this optimization, resulting in poor performance for SiGe TFT´s. We report on optimization studies done on the low-pressure chemical vapor deposition of SiGe and its effect on TFT performance. We detail the results of a response surface characterization of SiGe deposition, and explain the obtained results in terms of atomistic models of deposition. Optimization strategies to enable the fabrication of high-performance SiGe TFT´s are explained, Using these strategies, SiGe TFT´s fabricated using solid phase crystallization and a 550°C process are demonstrated, with mobility greater than 40 cm2/V-s. Analysis is also performed on the effect of Ge-catalysis on the maximum optimization range. Results suggest that SiGe may offer enhanced optimization ranges over Si, as a result of this catalysis
  • Keywords
    Ge-Si alloys; carrier mobility; chemical vapour deposition; driver circuits; liquid crystal displays; semiconductor materials; thin film transistors; 550 degC; SiGe; TFT; active matrix liquid crystal displays; amorphous precursor characteristics; atomistic models; channel deposition conditions; channel material; high-performance pixel transistors; integrated driver transistors; low-pressure chemical vapor deposition; mobility; optimization ranges; response surface characterization; solid phase crystallization; thermal budget; Active matrix liquid crystal displays; Atomic layer deposition; Chemical vapor deposition; Crystalline materials; Driver circuits; Fabrication; Germanium silicon alloys; Response surface methodology; Silicon germanium; Thin film transistors;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.704366
  • Filename
    704366