DocumentCode :
1407878
Title :
Application-Specific Processor for Piecewise Linear Functions Computation
Author :
Rodríguez, J. Agustín ; Lifschitz, Omar D. ; Jiménez-Fernandez, Víctor Manuel ; Julián, Pedro ; Agamennoni, Osvaldo Enrique
Author_Institution :
Dept. de Ing. Electr. y Computadoras, Univ. Nac. del Sur, Bahía Blanca, Argentina
Volume :
58
Issue :
5
fYear :
2011
fDate :
5/1/2011 12:00:00 AM
Firstpage :
971
Lastpage :
981
Abstract :
This paper presents an application specific processor architecture for the calculation of simplicial piecewise linear functions of up to six dimensions with 24-bit wide input words. The architecture, in particular registers and bus connections, is specifically designed for the task of simplicial piecewise linear computation. The parameters of the function are stored in an external 16 MB RAM memory. A proof-of-concept integrated circuit (that achieved first silicon success) was fabricated through MOSIS in a 4 mm × 4 mm 0.5 μm standard CMOS process using an automated design flow based on Synopsys and Cadence tools and the OSU standard cell library.
Keywords :
CMOS integrated circuits; piecewise linear techniques; random-access storage; CMOS process; MOSIS; OSU standard cell library; RAM memory; piecewise linear functions computation; processor architecture; proof-of-concept integrated circuit; size 0.5 mum; word length 24 bit; Microprocessors; Radio frequency; Random access memory; Registers; Sorting; Table lookup; Application specific; VLSI; function evaluation; microprocessor architecture; piecewise linear;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2010.2091196
Filename :
5672381
Link To Document :
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