• DocumentCode
    1423294
  • Title

    Ground-Bouncing-Noise-Aware Combinational MTCMOS Circuits

  • Author

    Jiao, Hailong ; Kursun, Volkan

  • Author_Institution
    Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong, China
  • Volume
    57
  • Issue
    8
  • fYear
    2010
  • Firstpage
    2053
  • Lastpage
    2065
  • Abstract
    Ground bouncing noise produced during the SLEEP to ACTIVE mode transitions is an important challenge in standard multithreshold CMOS (MTCMOS) circuits. The effectiveness of different noise-aware combinational MTCMOS circuit techniques to deal with the ground-bouncing-noise phenomenon is evaluated in this paper. An intermediate relaxation mode is investigated to gradually dump the charge stored on the virtual lines to the real ground distribution network during the SLEEP to ACTIVE mode transitions. The dependence of ground bouncing noise on the sleep transistor size and temperature is characterized with different power-gating structures. The peak amplitude of ground bouncing noise is reduced by up to 76.62% with the noise-aware techniques without sacrificing the savings in leakage power consumption as compared with standard MTCMOS circuits in a 90-nm CMOS technology.
  • Keywords
    CMOS digital integrated circuits; combinational circuits; integrated circuit noise; ACTIVE mode transitions; CMOS technology; SLEEP mode transitions; ground distribution network; ground-bouncing-noise-aware combinational MTCMOS circuit technique; intermediate relaxation mode; leakage power consumption; multithreshold CMOS circuits; power-gating structures; size 90 nm; Battery lifetime; SLEEP mode; SLEEP to ACTIVE mode transition; idle circuit; intermediate relaxation mode; leakage power consumption; on-chip noise; power gating;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2010.2041505
  • Filename
    5418906