DocumentCode :
1423940
Title :
Investigation of impedance based protection technique for EHV 3-terminal double circuit lines
Author :
Eissa, M.M. ; Malik, O.P.
Volume :
147
Issue :
6
fYear :
2000
fDate :
11/1/2000 12:00:00 AM
Firstpage :
317
Lastpage :
321
Abstract :
A digital impedance based protection scheme for a 3-terminal transmission line has been implemented on a digital signal processor board and tested on a physical model of a double-circuit 3-terminal line with a source at each end. One combined relay at each terminal of the double-circuit line, instead of two relays, is proposed. Each relay is fed by three voltage and six current signals. Real-time tests conducted on the physical model for various faults show that high fault resistance at the teed point, current infeed, remote-end infeeds, fault location, source impedance and far-end faults cause no problem in proper relay operation. Also, 100% of the lines are protected
Keywords :
digital signal processing chips; electric impedance; fault location; power transmission faults; power transmission protection; 3-terminal transmission line; EHV 3-terminal double circuit lines; combined relay; current infeed; current signals; digital impedance based protection scheme; digital signal processor board; double-circuit 3-terminal line; far-end faults; fault location; high fault resistance; impedance based protection technique; remote-end infeeds; source impedance; teed point; voltage signals;
fLanguage :
English
Journal_Title :
Generation, Transmission and Distribution, IEE Proceedings-
Publisher :
iet
ISSN :
1350-2360
Type :
jour
DOI :
10.1049/ip-gtd:20000655
Filename :
894391
Link To Document :
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