Title :
Multiple-input neuron MOS operational amplifier for voltage-mode multivalued full adders
Author :
Ogawa, Katsuhisa ; Shibata, Tadashi ; Ohmi, Tadahiro ; Takatsu, Motomu ; Yokoyama, Naoki
Author_Institution :
Dept. of Electron. Eng., Tohoku Univ., Sendai, Japan
fDate :
9/1/1998 12:00:00 AM
Abstract :
A CMOS operational amplifier employing the multiple-input-terminal transistor called neuron MOSFET (or νMOS) as pair transistors has been developed. The circuit can perform a variety of analog voltage summation/subtraction operations in a very simple circuitry. The self-offset-cancellation capability has been implemented by a clocked νMOS technique. As a result, high-accuracy voltage-mode signed-digit computation has become possible. The νMOS operational amplifier has been applied to build a carry-propagation-free multivalued full adder circuit based on the radix-4 seven-valued signed-digit number system. The circuit operation has been verified by test circuits fabricated by Tohoku University standard double-polysilicon CMOS process with a 3 μm rule
Keywords :
CMOS analogue integrated circuits; adders; analogue processing circuits; multivalued logic; operational amplifiers; 3 micron; CMOS operational amplifier; analog voltage summation/subtraction operations; carry-propagation-free adder circuit; clocked νMOS technique; double-polysilicon CMOS process; multiple-input neuron MOS op amp; multiple-input-terminal transistor; neuron MOSFET; self-offset-cancellation capability; signed-digit computation; voltage-mode multivalued full adders; Adders; Analog computers; Circuit testing; Clocks; MOSFET circuits; Multivalued logic; Neurons; Operational amplifiers; Signal processing algorithms; Voltage;
Journal_Title :
Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on
