Title :
A Radius Adaptive K-Best Decoder With Early Termination: Algorithm and VLSI Architecture
Author :
Shen, Chung-An ; Eltawil, Ahmed M.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Irvine, Irvine, CA, USA
Abstract :
This paper presents a novel algorithm and architecture for K-Best decoding that combines the benefits of radius shrinking commonly associated with sphere decoding and the architectural benefits associated with K-Best decoding approaches. The proposed algorithm requires much smaller K and possesses the advantages of branch pruning and adaptively updated pruning threshold while still achieving near-optimum performance. The algorithm examines a much smaller subset of points as compared to the K-Best decoder. The VLSI architecture of the decoder is based on a pipelined sorter-free scheme. The proposed K-Best decoder is designed to support a 4 × 4 64-QAM system and is synthesized with 65-nm technology at 158-MHz clock frequency and 1-V supply. The synthesized decoder can support a throughput of 285.8 Mb/s at 25-dB signal-to-noise ratio with an area of 210 kGE at 12.8-mW power consumption.
Keywords :
VLSI; adaptive decoding; clocks; quadrature amplitude modulation; QAM system; VLSI architecture; branch pruning; clock frequency; frequency 158 MHz; pipelined sorter-free scheme; pruning threshold; radius adaptive K-best decoder; size 65 nm; sphere decoding; synthesized decoder; voltage 1 V; Bit error rate; Clocks; Degradation; Frequency synthesizers; MIMO; Maximum likelihood decoding; Signal synthesis; Signal to noise ratio; Throughput; Very large scale integration; K-Best; VLSI; multiple input–multiple output (MIMO); sphere decoding;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2010.2043017