• DocumentCode
    1437726
  • Title

    Designing Floating Codes for Expected Performance

  • Author

    Chierichetti, Flavio ; Finucane, Hilary ; Liu, Zhenming ; Mitzenmacher, Michael

  • Author_Institution
    Dipt. di Inf., Sapienza Univ. of Rome, Rome, Italy
  • Volume
    56
  • Issue
    3
  • fYear
    2010
  • fDate
    3/1/2010 12:00:00 AM
  • Firstpage
    968
  • Lastpage
    978
  • Abstract
    Floating codes are codes designed to store multiple values in a Write Asymmetric Memory, with applications to flash memory. In this model, a memory consists of a block of n cells, with each cell in one of q states {0,1,...,q -1}. The cells are used to represent k variable values from an ¿-ary alphabet. Cells can move from lower values to higher values easily, but moving any cell from a higher value to a lower value requires first resetting the entire block to an all 0 state. Reset operations are to be avoided; generally a block can only experience a large but finite number of resets before wearing out entirely. A code here corresponds to a mapping from cell states to variable values, and a transition function that gives how to rewrite cell states when a variable is changed. Previous work has focused on developing codes that maximize the worst-case number of variable changes, or equivalently cell rewrites, that can be experienced before resetting. In this paper, we introduce the problem of maximizing the expected number of variable changes before resetting, given an underlying Markov chain that models variable changes. We demonstrate that codes designed for expected performance can differ substantially from optimal worst-case codes, and suggest constructions for some simple cases. We then study the related question of the performance of random codes, again focusing on the issue of expected behavior.
  • Keywords
    Markov processes; flash memories; random codes; write-once storage; Markov chain; flash memory; floating code design; random codes; write asymmetric memory; Codes; Electrons; Flash memory; Nonvolatile memory; Testing; Floating codes; average-case analysis; random floating codes; write asymmetric memory;
  • fLanguage
    English
  • Journal_Title
    Information Theory, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9448
  • Type

    jour

  • DOI
    10.1109/TIT.2009.2039040
  • Filename
    5429119