• DocumentCode
    14418
  • Title

    New Backend Processor Card for the Pipelined Readout System at Belle II

  • Author

    Suzuki, S.Y. ; Higuchi, Tatsuro ; Nakao, Masahiro ; Itoh, Ryusei ; Igarashi, Yoichiro

  • Author_Institution
    Comput. Res. Center (KEK), Tsukuba, Japan
  • Volume
    60
  • Issue
    5
  • fYear
    2013
  • fDate
    Oct. 2013
  • Firstpage
    3557
  • Lastpage
    3562
  • Abstract
    The Belle II experiment at the Super KEKB storage ring at KEK will search New Physics beyond the Standard Model, with 40 times higher luminosity than at KEKB. Much higher event rates are accounted for by moving all front-end digitizers inside or near the detector, and the resulting data received by a common pipeline readout platform developed in KEK. There are about 200 such platforms in the Belle II experiment. We have developed a new Intel Atom based processor card to handle the data and send it to the event building system in three steps. We fully utilize the PCI bus bandwidth and meet the high data rate requirement. In this report, we describe this processor card and the results from testing it in a realistic setup.
  • Keywords
    nuclear electronics; readout electronics; storage rings; Belle II experiment; Intel Atom; PCI bus bandwidth; Super KEKB storage ring; backend processor card; event building system; front-end digitizers; physics beyond standard model; pipeline readout platform; pipelined readout system; Bandwidth; Copper; Detectors; Hardware; Pipelines; Receivers; Throughput; Belle II experiment; data acquisition system;
  • fLanguage
    English
  • Journal_Title
    Nuclear Science, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9499
  • Type

    jour

  • DOI
    10.1109/TNS.2013.2265098
  • Filename
    6548100