DocumentCode :
1443849
Title :
Transistor characteristics with Ta/sub 2/O/sub 5/ gate dielectric
Author :
Park, Donggun ; King, Ya-Chin ; Lu, Qiang ; King, Tsu-Jae ; Hu, Chenming ; Kalnitsky, Alexander ; Tay, Sing-Pin ; Cheng, Chia-Cheng
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
Volume :
19
Issue :
11
fYear :
1998
Firstpage :
441
Lastpage :
443
Abstract :
As the gate oxide thickness decreases below 2 nm, the gate leakage current increases dramatically due to direct tunneling current. This large gate leakage current will be an obstacle to reducing gate oxide thickness for the high speed operation of future devices. A MOS transistor with Ta/sub 2/O/sub 5/ gate dielectric is fabricated and characterized as a possible replacement for MOS transistors with ultra-thin gate silicon dioxide. Mobility, I/sub d/-V/sub d/, I/sub d/-V/sub g/, gate leakage current, and capacitance-voltage (C-V) characteristics of Ta/sub 2/O/sub 5/ transistors are evaluated and compared with SiO/sub 2/ transistors. The gate leakage current is three to five orders smaller for Ta/sub 2/O/sub 5/ transistors than SiO/sub 2/ transistors.
Keywords :
MOSFET; carrier mobility; dielectric thin films; leakage currents; tantalum compounds; tunnelling; MOS transistor; Ta/sub 2/O/sub 5/; Ta/sub 2/O/sub 5/ gate dielectric; capacitance-voltage characteristics; carrier mobility; current-voltage characteristics; high speed device; leakage current; tunneling current; ultrathin gate oxide; Annealing; Capacitance; Dielectrics; Electron traps; Leakage current; MOSFET circuits; Random access memory; Tin; Tunneling; Voltage;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/55.728906
Filename :
728906
Link To Document :
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