Title :
A Novel High-Voltage (
600 V) LDMOSFET With Buried N-Layer in Partial SOI Technology
Author :
Hu, Yue ; Huang, Qijun ; Wang, Gaofeng ; Chang, Sheng ; Wang, Hao
Author_Institution :
Sch. of Phys. & Technol., Wuhan Univ., Wuhan, China
fDate :
4/1/2012 12:00:00 AM
Abstract :
A novel lateral double-diffused metal-oxide-semiconductor (LDMOS) field-effect transistor with a buried N-type layer (BNL) in partial silicon-on-insulator (PSOI) is introduced to achieve breakdown voltage (BV) above 600 V and reduce on-resistance (Ron). The BNL induces enhanced voltage into the buried oxide layer, which results in higher BV. The higher doping concentration in the BNL can provide more electrons to support higher current and thus reduce on-resistance. The proposed LDMOS transistor with a BNL in PSOI (BNL-PSOI) is analyzed and compared with LDMOS transistors with conventional SOI (CSOI), conventional PSOI (CPSOI), and a BNL in SOI (BNL-SOI) by 2-D numerical simulations. The results indicate that the proposed structure can significantly improve BV up to 660 V and reduce on-resistance by 13.6%-15.5% in comparison to CSOI and CPSOI.
Keywords :
MOSFET; buried layers; numerical analysis; semiconductor doping; silicon-on-insulator; 2D numerical simulations; BNL-PSOI; breakdown voltage; buried N-type layer; buried oxide layer; doping concentration; high-voltage LDMOSFET; lateral double-diffused metal-oxide-semiconductor field-effect transistor; on-resistance reduction; partial SOI technology; partial silicon-on-insulator; Doping; Electric breakdown; Silicon; Silicon on insulator technology; Substrates; Transistors; Breakdown voltage (BV); buried N-type layer (BNL); lateral double-diffused metal–oxide–semiconductor (LDMOS); on -resistance $(R_{rm on})$; partial silicon-on-insulator (PSOI);
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2012.2185498