DocumentCode :
1449735
Title :
A 10-b, 500-MSample/s CMOS DAC in 0.6 mm2
Author :
Lin, Chi-Hung ; Bult, Klaas
Author_Institution :
Broadcom Corp., Irvine, CA, USA
Volume :
33
Issue :
12
fYear :
1998
fDate :
12/1/1998 12:00:00 AM
Firstpage :
1948
Lastpage :
1958
Abstract :
A 10-b current steering CMOS digital-to-analog converter (DAC) is described, with optimized performance for frequency domain applications. For sampling frequencies up to 200 MSample/s, the spurious free dynamic range (SFDR) is better than 60 dB for signals from DC to Nyquist. For sampling frequencies up to 400 MSample/s, the SFDR is better than 55 dB for signals from DC to Nyquist. The measured differential nonlinearity and integral nonlinearity are 0.1 least significant bit (LSB) and 0.2 LSB, respectively. The circuit is fabricated in a 0.35-μm, single-poly, four-metal, 3.3 V, standard digital CMOS process and occupies 0.6 mm2. When operating at 500 MSample/s, it dissipates 125 mW from a 3.3 V power supply. This DAC is optimized for embedded applications with large amounts of digital circuitry
Keywords :
CMOS integrated circuits; digital-analogue conversion; 0.35 micron; 10 bit; 125 mW; 3.3 V; CMOS DAC; current steering DAC; digital-to-analog converter; embedded applications; frequency domain applications; single-poly four-metal CMOS process; Application software; CMOS analog integrated circuits; CMOS digital integrated circuits; CMOS process; Cable TV; Digital-analog conversion; Dynamic range; Frequency domain analysis; Modems; Sampling methods;
fLanguage :
English
Journal_Title :
Solid-State Circuits, IEEE Journal of
Publisher :
ieee
ISSN :
0018-9200
Type :
jour
DOI :
10.1109/4.735535
Filename :
735535
Link To Document :
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