DocumentCode :
1450356
Title :
ReMAP: A Reconfigurable Architecture for Chip Multiprocessors
Author :
Watkins, Matthew A. ; Albonesi, David H.
Volume :
31
Issue :
1
fYear :
2011
Firstpage :
65
Lastpage :
77
Abstract :
ReMAP is a reconfigurable architecture for accelerating and parallelizing applications within a heterogeneous chip multiprocessor (CMP). Clusters of cores share a common reconfigurable fabric adaptable for individual thread computation or fine-grained communication with integrated computation. ReMAP demonstrates significantly higher performance and energy efficiency than hard-wired communication-only mechanisms, and over allocating the fabric area to additional or more powerful cores.
Keywords :
fabrics; microprocessor chips; multiprocessing systems; pattern clustering; reconfigurable architectures; threading (machining); Remap; core cluster; energy efficiency; fine grained communication; hard wired communication; heterogeneous chip multiprocessor; integrated computation; parallelizing application; reconfigurable architecture; reconfigurable fabric; thread computation; Acceleration; Computer architecture; Multiprocessing systems; Parallel processing; Reconfigurable architectures; ReMAP; chip multiprocessors; fine-grained communication; reconfigurable architecture; specialized programmable logic;
fLanguage :
English
Journal_Title :
Micro, IEEE
Publisher :
ieee
ISSN :
0272-1732
Type :
jour
DOI :
10.1109/MM.2011.14
Filename :
5713323
Link To Document :
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