DocumentCode
1451005
Title
A Fast and Accurate Method to Study the Impact of Interface Traps on Germanium MOS Performance
Author
Hellings, Geert ; Eneman, Geert ; Mitard, Jérôme ; Martens, Koen ; Wang, Wei-E ; Hoffmann, Thomas ; Meuris, Marc ; De Meyer, Kristin
Author_Institution
Interuniversity Microelectron. Centre, Leuven, Belgium
Volume
58
Issue
4
fYear
2011
fDate
4/1/2011 12:00:00 AM
Firstpage
938
Lastpage
944
Abstract
A technique is presented to study the electrostatic degradation of key germanium metal-oxide-semiconductor field-effect transistor (MOSFET) performance metrics such as the subthreshold slope SS, the drive current, and the off-state current. This is calculated using the superposition of the contributions from individual trap profiles, arising from a piecewise approximation of any arbitrary interface-trap spectrum. A technology computer-aided design simulation using this approach has been directly applied to the electrical evaluation of various scaled Ge p-channel FETs with different passivation schemes. The relative SS degradation due to interface traps is shown to be independent of the gate length, even in scaled devices exhibiting short-channel effects. Additionally, a linear dependence of the relative degradation with an equivalent oxide thickness (EOT) is observed. As such, a transistor´s subthreshold performance is less impacted by a given concentration of interface traps, as the EOT is further reduced. Finally, the MOSFET drive current is shown to be degraded due to interface traps, mainly through additional scattering in the channel, while the electrostatic effect is rather small.
Keywords
MOSFET; germanium; piecewise polynomial techniques; technology CAD (electronics); Ge; MOSFET performance metrics; OFF-state current; TCAD; arbitrary interface-trap spectrum; drive current; electrostatic degradation; equivalent oxide thickness; metal-oxide-semiconductor field-effect transistor; p-channel FET; piecewise approximation; subthreshold slope; technology computer-aided design simulation; transistor subthreshold performance; Degradation; Electrostatics; Logic gates; MOSFETs; Passivation; Silicon; Germanium; interface traps; metal–oxide–semiconductor field-effect transistor (MOSFET); modeling; technology computer-aided design (TCAD) simulations;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2011.2106503
Filename
5714002
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