• DocumentCode
    1451244
  • Title

    Input polling arbitration mechanism for a gigabit packet switch

  • Author

    Son, J.W. ; Oh, Y.Y. ; Lee, H.T. ; Lee, J.Y. ; Lee, S.B.

  • Author_Institution
    Dept. of Electron. Eng., Yonsei Univ., Seoul, South Korea
  • Volume
    32
  • Issue
    22
  • fYear
    1996
  • fDate
    10/24/1996 12:00:00 AM
  • Firstpage
    2050
  • Lastpage
    2051
  • Abstract
    Two head of line (HOL) packet arbitration mechanisms in an input buffered gigabit packet switch are proposed. These mechanisms have significant advantages in simple implementation while their performances still remain at acceptable levels
  • Keywords
    digital communication; packet switching; protocols; gigabit packet switch; head of line arbitration mechanism; input buffered packet switch; input polling arbitration mechanism;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19961368
  • Filename
    543807
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1451244