Title :
Design and development of a lab-model silicon epitaxial reactor
Author :
Balain, K.S. ; Vyas, P.D. ; Dixit, B.B.
Author_Institution :
Central Electronics Engineering Research Institute, Pilani, India
Abstract :
A semiautomatic, horizontal type silicon epitaxial reactor has been designed, fabricated and utilised. All the design aspects such as cleanliness, compactness and streamlined structure of the reactor for handling upto four 1¿¿ diameter wafers have been taken into account. The design of reactor is simple and utilises around 90% indigenous components. The present model is designed for premixed doped silicon tetra-chloride but can be modified easily for gas doping also. Device quality epi-layers both on n+ and p substrates for discrete devices as well as integrated circuits have been obtained. The main specifications are: 1. Thickness variation from wafer to wafer is 1 to 2 microns and edge variation of wafer is ± 0·5 microns. 2. Resistivity variations from wafer to wafer is ± 0·5 ohm-cm and edge variation on a wafer is + 0·25 ohm-cm. 3. Stacking fault density is less than 100/sq. cm.
Keywords :
epitaxial growth; silicon; Si; epitaxial growth; epitaxial reactor; semiconductor growth;
Journal_Title :
India, IEE-IERE Proceedings -
DOI :
10.1049/iipi.1975.0010