Prognostic methodology for deep submicron semiconductor failure modes

Semiconductor reliability issues are beginning to emerge as a major impediment to long term reliability of critical systems such as Internet routers, ATM machines, and Automotive/Aerospace fly-by-wire systems. Semiconductors have certain defined failure modes that can contribute to end-of life failures. These modes include time-dependent dielectric breakdown of the gate oxide (TDDB), hot carrier damage, and metal migration. All of these common failure modes are far worse at geometries below 0.25 μm. Fortunately, there are methods proposed that counteract these common failure modes. This paper surveys the problems involved, and recommends a methodology for the inclusion of pre-calibrated prognostic cells that can be co-located with a host circuit to provide an “early-warning” of a system failure, so that appropriate corrective action can be taken